Source code for hwt.hwIOs.signalOps

from typing import Optional

from hwt.doc_markers import internal
from hwt.hdl.types.hdlType import HdlType


[docs] class SignalOps(object): """ Operands for Signal interface, These operands are delegated on RtlSignal object for this interface """
[docs] def _auto_cast(self, toT: HdlType): return self._sig._auto_cast(toT)
[docs] @internal def _cast_sign(self, signed: Optional[bool]): return self._sig._cast_sign(signed)
[docs] def _signed(self): return self._cast_sign(True)
[docs] def _unsigned(self): return self._cast_sign(False)
[docs] def _vec(self): return self._cast_sign(None)
[docs] def _explicit_cast(self, toT: HdlType): return self._sig._explicit_cast(toT)
[docs] def _reinterpret_cast(self, toT: HdlType): return self._sig._reinterpret_cast(toT)
# events
[docs] def _onRisingEdge(self): return self._sig._onRisingEdge()
[docs] def _onFallingEdge(self): return self._sig._onFallingEdge()
# comparison
[docs] def _isOn(self): """ convert this signal to 1 bit value which is 1 if the value is considered active (1 if not negated 0 if negated) """ return self._sig._isOn()
[docs] def getMsb(self): return self._sig.getMsb()
[docs] def _eq(self, other): """ Equality operator "==" is not used because it would damage python ecosystem """ return self._sig._eq(other)
def __ne__(self, other): """!=""" return self._sig.__ne__(other) def __gt__(self, other): """>""" return self._sig.__gt__(other) def __lt__(self, other): """<""" return self._sig.__lt__(other) def __ge__(self, other): """>=""" return self._sig.__ge__(other) def __le__(self, other): """<=""" return self._sig.__le__(other) # bitwise def __invert__(self): """~ operator - logical negation for one bit signals bitwise inversion for wider signals """ return self._sig.__invert__() def __and__(self, other): """ & operator - logical 'and' for one bit signals bitwise and for wider signals """ return self._sig.__and__(other) def __xor__(self, other): """ ^ operator - logical '!=' for one bit signals bitwise and for wider signals """ return self._sig.__xor__(other) def __or__(self, other): """ | operator - logical 'or' for one bit signals bitwise and for wider signals """ return self._sig.__or__(other) # arithmetic def __neg__(self): "- operator (unary minus)" return self._sig.__neg__() def __add__(self, other): "+ operator" return self._sig.__add__(other) def __sub__(self, other): "- operator" return self._sig.__sub__(other) def __mul__(self, other): "* operator" return self._sig.__mul__(other) def __pow__(self, other): "** operator" return self._sig.__pow__(other) def __mod__(self, other): "% operator" return self._sig.__mod__(other) def __truediv__(self, other): "/ operator - floating point division" return self._sig.__truediv__(other) def __floordiv__(self, other): "// operator - integer division" return self._sig.__floordiv__(other) def __lshift__(self, other): "<< left shift (on fixed number of bits)" return self._sig.__lshift__(other) def __rshift__(self, other): ">> right shift (on fixed number of bits)" return self._sig.__rshift__(other) # hdl centric
[docs] def _reversed(self): """ reverse bitorder """ # https://stackoverflow.com/questions/27638960/python-reverse-magic-method return self._sig._reversed()
[docs] def _concat(self, *others): """ concatenate signals to one big one """ return self._sig._concat(*others)
def __getitem__(self, key): """ [] operator key can be slice or index """ return self._sig.__getitem__(key)
[docs] def _ternary(self, ifTrue, ifFalse): return self._sig._ternary(ifTrue, ifFalse)
def __call__(self, source, exclude=None, fit=False): """ connect this signal to driver :attention: it is not call of function it is operator of assignment :return: list of assignments """ assert self._isAccessible, self return self._sig(source, exclude=None, fit=fit) def __getattr__(self, name:str): if name == "_dtype" or name == "_setAttrListener" or self._setAttrListener is not None: raise AttributeError(name) try: sigProp = getattr(self._sig, name) except AttributeError: raise AttributeError(name) from None return sigProp