hwt.synthesizer.rtlLevel package¶
rtlLevel is responsible for RtlSignal manipulation and design.
Submodules¶
hwt.synthesizer.rtlLevel.exceptions module¶
- exception hwt.synthesizer.rtlLevel.exceptions.SignalDriverErr[source]¶
Bases:
ExceptionSignal has multiple combinational drivers (this is not possible in real word) or signal has no driver specified and it drives something which has effect on any output of component (it needs to have a driver but it does not have one)
- Note:
SignalDriverErr([(SignalDriverErrType, sig), ])
hwt.synthesizer.rtlLevel.extract_part_drivers module¶
hwt.synthesizer.rtlLevel.fill_stm_list_with_enclosure module¶
- class hwt.synthesizer.rtlLevel.fill_stm_list_with_enclosure.HdlAssignmentContainer_constructor(src, dst)[source]¶
Bases:
object
- hwt.synthesizer.rtlLevel.fill_stm_list_with_enclosure.fill_stm_list_with_enclosure(parentStm: HdlStatement | None, current_enclosure: Set[RtlSignalBase], statements: ListOfHdlStatement, do_enclose_for: List[RtlSignalBase], enclosure: Dict[RtlSignalBase, Callable[[], HdlStatement]]) ListOfHdlStatement[source]¶
Apply enclosure on list of statements (fill all unused code branches with assignments from value specified by enclosure)
- Parameters:
parentStm – optional parent statement where this list is some branch
current_enclosure – list of signals for which this statement list is enclosed
statements – list of statements
do_enclose_for – selected signals for which enclosure should be used
enclosure – enclosure values for signals
- Attention:
original statements parameter can be modified
- Returns:
new statements
hwt.synthesizer.rtlLevel.mark_visibility_of_signals_and_check_drivers module¶
- class hwt.synthesizer.rtlLevel.mark_visibility_of_signals_and_check_drivers.RtlNetlistPassMarkVisibilityOfSignalsAndCheckDrivers[source]¶
Bases:
RtlNetlistPass
- hwt.synthesizer.rtlLevel.mark_visibility_of_signals_and_check_drivers.walk_assignments(stm: HdlStatement, dst: RtlSignal) Generator[HdlAssignmentContainer, None, None][source]¶
hwt.synthesizer.rtlLevel.netlist module¶
hwt.synthesizer.rtlLevel.reduce_processes module¶
hwt.synthesizer.rtlLevel.remove_unconnected_signals module¶
hwt.synthesizer.rtlLevel.rtlNetlistPass module¶
hwt.synthesizer.rtlLevel.rtlSignal module¶
- class hwt.synthesizer.rtlLevel.rtlSignal.RtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)[source]¶
Bases:
RtlSignalBase,HdlSignalItemRtlSignal signal is a connection between statements and operators in circuit graph.
- Variables:
~._rtlEndpoints – SetList of operators and statements for which this signal is driver.
~._rtlDrivers – SetList of operators and statements which can drive this signal. If driver is statement tree only top statement is present.
~._usedOps – A dictionary of used operators which can be reused.
~._usedOpsAlias – A dictionary tuple of operator and operands to set of tuples of operator and operands, used to resolve which combination of the operator and operands resulted in to same result.
~._isUnnamedExpr – means that this signal is part of expression and should not be rendered
~._nop_val – value which is used to fill up statements when no other value is assigned, use NOT_SPECIFIED to disable
~._const – flag which tell that this signal can not have any other driver than a default value
__instCntr – counter used for generating instance ids
~._instId – internally used only for intuitive sorting of statements in serialized code
~._rtlObjectOrigin – optionally an object which generated this signal
~._rtlNextSig – optional signal signal which is used as a next signal if this RtlSignal is actually a FF output.
- Note:
The _usedOps, _usedOpsAlias cache record is generated only for the left most signal in expression.
- __init__(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)[source]¶
- Parameters:
ctx – context - RtlNetlist which is this signal part of
name – name hint for this signal, if is None name is chosen automatically
def_val – value which is used for reset and as default value in HDL
nop_val – value which is used to fill up statements when no other value is assigned, use NOT_SPECIFIED to disable
is_const – flag which tell that this signal can not have any other driver than a default value
- _auto_cast(toType: HdlType)[source]¶
Cast value or signal of this type to another compatible type.
- Parameters:
toType – instance of HdlType to cast into
- _const¶
- _create_HOperator(operator: HOperatorDef, opCreateDelegate, *otherOps) Self | HConst[source]¶
Try lookup operator with this parameters in _usedOps if not found create new one and stored it in _usedOps
- Parameters:
operator – instance of HOperatorDef
opCreateDelegate – function (*ops) to create operator
otherOps – other operands (ops = self + otherOps)
- Returns:
RtlSignal which is result of newly created operator
- _ctx¶
- _explicit_cast(toType: HdlType)[source]¶
Cast value or signal of this type to another friendly type.
- Parameters:
toType – instance of HdlType to cast into
- _getDestinationSignalForAssignmentToThis()[source]¶
- Returns:
a signal which should be used as a destination if assigning to this signal
- _hasGenericName¶
- _hdlName¶
- _hwIO¶
- _instId: int¶
- _isUnnamedExpr: bool¶
- _nop_val¶
- _reinterpret_cast(toType: HdlType)[source]¶
Cast value or signal of this type to another type of same size.
- Parameters:
toType – instance of HdlType to cast into
- _rtlDrivers: SetList[HdlStatement, HdlPortItem, 'Operator']¶
- _rtlEndpoints: SetList[HdlStatement | HdlPortItem | 'Operator']¶
- _rtlObjectOrigin¶
- _usedOpsAlias: Dict[OperatorCaheKeyType, Set[OperatorCaheKeyType]]¶
- _walk_public_drivers(seen: set) Generator[RtlSignal, None, None][source]¶
Walk all non hidden signals in an expression
- _walk_sensitivity(casualSensitivity: Set[RtlSignalBase], seen: Set[RtlSignalBase], ctx: SensitivityCtx)[source]¶
Walk expression and collect signals which is this expression sensitive to. (:see: what is signal sensitivity in vhdl/verilog)
- Parameters:
casualSensitivity – set of public signals which is this expression sensitive to but rising/faling edge operator is not present
seen – set of all seen signals
ctx – context where sensitivity
hwt.synthesizer.rtlLevel.rtlSignalWalkers module¶
- hwt.synthesizer.rtlLevel.rtlSignalWalkers.discoverEventDependency(sig: RtlSignalBase)[source]¶
- Returns:
generator of tuples (event operator, signal)
- hwt.synthesizer.rtlLevel.rtlSignalWalkers.discover_sensitivity_of_sig(signal: RtlSignalBase, seen: set, ctx: SensitivityCtx)[source]¶