hwt.hdl.types package

This package contains HDL types (e.g. HBits), value classes and conversion functions for them.

The HWT typesystem is similar to C typesystem but there are some key differences:

• The HWT does have an explicit pointer or reference type, instead it uses signals or HBits (int) representation of address

• Every HWT type is packed (the structures are represented in memory as they are written, there is no automatic padding or alignment logic)

• The HWT HStruct/HUnion members may have name set to None, which denotes the padding.

• The HWT has HStream type. This type can have variable data size and specifies possible alignment and size combinations. This is required for packet processing in general as it allows for description of the format of the packets.

HWT types are divided into:

• note:

  There are no restrictions on use of anything from python.

  This list of types referes to a types for RtlSignal/HConst classes which are used to build a circuit.

• Types with physical representation * hwt.hdl.types.bits.HBits - int/bit vector, signed/unsigned/no-signed, to VHDL/Verilog

  • There are several commonly used definitions in hwtLib.types.ctypes (e.g. hwtLib.types.ctypes.uint8_t) and in hwt.hdl.types.defs (e.g. hwt.hdl.types.defs.BIT)

  • The type may have several flags which control endianity, default casting rules and negations :see: hwt.hdl.types.bits.HBits

  • hwt.hdl.types.array.HArray - fixed size array of any type, natively converted to VHDL/Verilog

  • hwt.hdl.types.struct.HStruct - fixed size struct type. Member name=None denotes padding.

• Types witout physical representation (only for HDL compatibility, no synthetizable operands) * hwt.hdl.types.float.HFloat - intended for generics/params only * hwt.hdl.types.slice.HSlice - result of to/downto operator which

  does not have explicit type in VHDL/Verilog

  • hwt.hdl.types.string.HString - intended for generics/params only

• Types with multiple physical representations which has to be picked compiletime * hwt.hdl.types.enum.HEnum - natively supported in VHLD, lowered to HBits in Verilog * hwt.hdl.types.stream.HStream - template of the frame which has to be lowered before HW construction * hwt.hdl.types.union.HUnion - syntax shugar

For practical examples see hwtLib.examples.tutorialTypesystem_test.TutorialTypesystemTC

The types in HWT are implemented as a type class which inherits from hwt.hdl.types.hdlType.HdlType, RtlSignal class which interits form hwt.synthesizer.rtlLevel.rtlSignal.RtlSignal and a HConst class which inherits from hwt.hdl.const.HConst. These classes are linked together using hwt.hdl.types.hdlType.HdlType.getConstCls(), hwt.hdl.types.hdlType.HdlType.getRtlSignalCls() defined on type class. Note that the type class behaves as a template of the HDL type and the HDL type itself is an instance of this class.

The supported operators/functions are entrirely define by type RtlSignal/HConst class for a given HdlType.

The type itself does not need any kind of registration in HWT. That means that user can freely define custom types and use them in design. Also note that the mentioned classes are regular python classes and inheritance works as expected, meaning that the current types can be extended as well.

Casting rules

• If conversion is not applicable TypeConversionErr or NotImplementedError is raised

• Any cast to same type is always allowed and does nothing.

see:

doc of type classes like hwt.hdl.types.bits.HBits for detail, this is just overview

auto_cast

• same type same type with just minor differences. e.g. name, HBits.negated/force_vector/… flags

explicit_cast

• cast to a friendly type e.g. HBits with different sign/width/precission etc.

reinterpret_cast

• reinterpret_cast takes raw bits of value and reinterprets them as a value of the same type. This implies that the width of the type must be the same and type has to have physical representation. e.g. HStruct to HBits

• HFloat, HSlice, HString do not have physical representation thus they do not support reinterpret_cast.

• HStream, HEnum and HUnion do not have fixed physical representation thus they also do not support reinterpret_cast.

reinterpret_cast |HArray HBits HStruct HUnion, HEnum, HUnion ======================|======= ======= ======= ===================== HArray |y y y n HBits |y y y n HStruct |y y y n HUnion, HEnum, HUnion |n n n n

Submodules

hwt.hdl.types.array module

class hwt.hdl.types.array.HArray(element_t: HdlType, size: int, const: bool = False)

Bases: HdlType

HDL array type

Variables:

• ~.element_t – type of elements

• ~.size – number of items

__init__(element_t: HdlType, size: int, const: bool = False)

bit_length()

Returns:

bit width for this type

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod get_reinterpret_cast_HConst_fn()

classmethod get_reinterpret_cast_RtlSignal_fn()

isScalar()

hwt.hdl.types.arrayCast module

hwt.hdl.types.arrayConst module

class hwt.hdl.types.arrayConst.HArrayConst(dtype: HdlType, val, vld_mask)

Bases: HConst

Class for values of array HDL type

_dtype

_eq(other)

See:

SignalOps._eq()

_getitem__const(key)

Attention:

this will clone item from array, iterate over .val if you need to modify items

_is_full_valid()

_is_partially_valid() → bool

classmethod from_py(typeObj, val, vld_mask=None)

Parameters:

• val – None or dictionary {index:HConst} or iterrable of values

• vld_mask – if is None validity is resolved from val if is 0 value is invalidated if is 1 value has to be valid

to_py() → list

Cast HConst back to pythonic value like int/float/list[int] etc.

val

vld_mask

class hwt.hdl.types.arrayConst.HArrayRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_const

_ctx

_hasGenericName

_hdlName

_hwIO

_instId

_isUnnamedExpr

_nop_val

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_usedOps

_usedOpsAlias

hwt.hdl.types.arrayConst._HArrayGetitem(self: HArrayRtlSignal | HArrayConst, iamVal: bool, key)

hwt.hdl.types.bitConstFunctions module

hwt.hdl.types.bitConstFunctions.HBits_auto_cast_operands_to_same_type(self: HBitsRtlSignal | HBitsConst, other: HBitsRtlSignal | HBitsConst, opForDebug)

hwt.hdl.types.bitConstFunctions.HBits_common_operand_type_checks(self: HBitsRtlSignal | HBitsConst, other: HBitsRtlSignal | HBitsConst)

hwt.hdl.types.bitConstFunctions.HBits_common_operand_type_checks_for_other(other: HBitsRtlSignal | HBitsConst, t: HBits)

hwt.hdl.types.bitConstFunctions.HBits_common_operand_type_checks_for_self(self: HBitsRtlSignal | HBitsConst)

hwt.hdl.types.bitConstFunctions._bitsMulModGetResultType(myT: HBits, otherT: HBits)

hwt.hdl.types.bitConstFunctions.bitsArithOp(self: HBitsRtlSignal | HBitsConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None, op: HOperatorDef) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctions.bitsBitOp(self: RtlSignalBase | HConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None, op: HOperatorDef, getVldFn: Callable[[HConst, HConst], int], reduceValCheckFn: Callable[[RtlSignalBase, HConst], bool], reduceSigCheckFn: Callable[[RtlSignalBase, bool, bool], RtlSignalBase | HConst]) → HBitsRtlSignal | HBitsConst

Apply a generic bitwise binary operator

Attention:

If other is Bool signal, convert this to bool (not ideal, due VHDL event operator)

Variables:

• self – operand 0

• other – operand 1

• op – operator used

• getVldFn – function to resolve invalid (X) states

• reduceValCheckFn – function to reduce useless operators (partially evaluate the expression if possible)

• reduceSigCheckFn – function to reduce useless operators for signals and its negation flags (e.g. a&a = a, a&~a=0, b^b=0) function parameters are in format (op0Original:RtlSignalBase, op0Negated: bool, op1Negated:bool) -> Union[RtlSignalBase, HConst]: returns result signal if reduction is possible else None

hwt.hdl.types.bitConstFunctions.bitsCmp(self: HBitsRtlSignal | HBitsConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None, op: HOperatorDef, selfReduceVal: HConst, evalFn: Callable[[HBitsRtlSignal | HBitsConst, HBitsRtlSignal | HBitsConst], HBitsRtlSignal | HBitsConst] = None) → HBitsRtlSignal | HBitsConst

Apply a generic comparison binary operator

Attention:

If other is bool signal convert this to bool (not ideal, due VHDL event operator)

Variables:

• self – operand 0

• other – operand 1

• op – operator used

• selfReduceVal – the value which is a result if operands are all same signal (e.g. a==a = 1, b<b=0)

• evalFn – override of a python operator function (by default one from “op” is used)

hwt.hdl.types.bitConstFunctions.bitsCmp_detect_useless_cmp(op0: HBitsRtlSignal, op1: HBitsConst, op: HOperatorDef) → None | HBitsRtlSignal | HOperatorDef

hwt.hdl.types.bitConstFunctions.bitsFloordiv(self: HBitsRtlSignal | HBitsConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctions.bitsIsOn(op: HBitsRtlSignal | HBitsConst) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctions.bitsLshift(self: HBitsRtlSignal | HBitsConst, shiftAmount: HBitsRtlSignal | HBitsConst | int | None) → HBitsRtlSignal | HBitsConst

shift left by a constant amount with 0 padding

hwt.hdl.types.bitConstFunctions.bitsMul(self: HBitsRtlSignal | HBitsConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctions.bitsRem(self: HBitsRtlSignal | HBitsConst, selfIsHConst: bool, other: HBitsRtlSignal | HBitsConst | int | None) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctions.bitsRshift(self: HBitsRtlSignal | HBitsConst, shiftAmount: HBitsRtlSignal | HBitsConst | int | None) → HBitsRtlSignal | HBitsConst

shift right by a constant amount

Note:

arithmetic shift if type is signed else logical shift with 0 padding

hwt.hdl.types.bitConstFunctions.extractNegation(sig: RtlSignalBase) → tuple[HBitsRtlSignal | HBitsConst, bool]

Returns:

tuple(the signal without negation, True if signal was negated)

hwt.hdl.types.bitConstFunctionsGetitem module

hwt.hdl.types.bitConstFunctionsGetitem._fold_concat_of_msb_using_sext(v: HBitsRtlSignal, vReplicatinCount: int, other: HBitsRtlSignal, other_w: int)

hwt.hdl.types.bitConstFunctionsGetitem._get_operator_i_am_the_result_of(const_or_sig: RtlSignalBase | HConst) → HOperatorDef | None

hwt.hdl.types.bitConstFunctionsGetitem._match_msb_get(v: HBitsRtlSignal)

Returns:

x if v == x[x.width - 1] else None

hwt.hdl.types.bitConstFunctionsGetitem.bitsGetitem(v: HBitsRtlSignal | HBitsConst, iamConst: bool, key: int | slice | RtlSignalBase[HSlice] | RtlSignalBase[HBits] | None) → HBitsRtlSignal | HBitsConst

[] operator

Attention:

Table below is for little endian bit order (MSB:LSB) which is default. This is reversed as it is in pure python where it is [0, len(v)].

Attention:

Slice on slice signal is automatically reduced to single slice. This function also looks trough concatenations.

a[up:low]		items low through up; a[16:8] selects upper byte from 16b vector a
a[up:]		low is automatically substituted with 0; a[8:] will select lower 8 bits
a[:end]		up is automatically substituted; a[:8] will select upper byte from 16b vector a
a[:], a[-1], a[-2:], a[:-2] | raises NotImplementedError (not implemented due to complicated support in hdl)

Note:

signed is preserved as in VHDL, and not like in Verilog where result of slice is always unsigned

hwt.hdl.types.bitConstFunctionsGetitem.bitsGetitem_foldBitGetOnConcat(v: HBitsRtlSignal | HBitsConst, key: int | slice | RtlSignalBase[HSlice] | RtlSignalBase[HBits] | None, _index: int, iAmResultOfOp: HOperatorDef | None)

hwt.hdl.types.bitConstFunctionsGetitem.bitsGetitem_foldBitGetOnEXT(v: HBitsRtlSignal | HBitsConst, i: int, key: int | slice | ~hwt.mainBases.RtlSignalBase[~hwt.hdl.types.slice.HSlice] | ~hwt.mainBases.RtlSignalBase[~hwt.hdl.types.bits.HBits] | None, iAmResultOfOp: ~typing.Literal[<HOperatorDef ZEXT>, <HOperatorDef SEXT>]) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctionsGetitem.bitsGetitem_foldSliceOnCONCAT(v: HBitsRtlSignal | HBitsConst, start: int, stop: int, key: int | slice | RtlSignalBase[HSlice] | RtlSignalBase[HBits] | None) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConstFunctionsGetitem.bitsGetitem_foldSliceOnEXT(v: HBitsRtlSignal | HBitsConst, start: int, stop: int, key: int | slice | ~hwt.mainBases.RtlSignalBase[~hwt.hdl.types.slice.HSlice] | ~hwt.mainBases.RtlSignalBase[~hwt.hdl.types.bits.HBits] | None, iAmResultOfOp: ~typing.Literal[<HOperatorDef ZEXT>, <HOperatorDef SEXT>]) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitConst_opReduce module

hwt.hdl.types.bitConst_opReduce.reduceSigCheckFnAnd(op0Original: RtlSignalBase, op0Negated: bool, op1Negated: bool) → RtlSignalBase | HConst

hwt.hdl.types.bitConst_opReduce.reduceSigCheckFnOr(op0Original: RtlSignalBase, op0Negated: bool, op1Negated: bool) → RtlSignalBase | HConst

hwt.hdl.types.bitConst_opReduce.reduceSigCheckFnXor(op0Original: RtlSignalBase, op0Negated: bool, op1Negated: bool) → RtlSignalBase | HConst

hwt.hdl.types.bitConst_opReduce.tryReduceAnd(sig: RtlSignalBase, val: HConst)

Return sig and val reduced by & operator or None if it is not possible to statically reduce expression

hwt.hdl.types.bitConst_opReduce.tryReduceOr(sig: RtlSignalBase, val: HConst)

Return sig and val reduced by | operator or None if it is not possible to statically reduce expression

hwt.hdl.types.bitConst_opReduce.tryReduceXor(sig: RtlSignalBase, val: HConst)

Return sig and val reduced by ^ operator or None if it is not possible to statically reduce expression

hwt.hdl.types.bits module

class hwt.hdl.types.bits.HBits(bit_length: int | AnyHBitsValue, signed: Literal[None, True, False] = None, force_vector: bool = False, negated: bool = False, is_bigendian: bool = False, byte_width: int = 8, name: str | None = None, const: bool = False, strict_sign: bool = True, strict_width: bool = True)

Bases: HdlType, Bits3t

Elemental HDL type representing bits (vector or single bit)

See:

pyMathBitPrecise.bits3t.Bits3t

Variables:

• negated – if true the value is in negated form The result of the _isOn() operator is negation of this value, “~” operator returns value of same type, and or xor operands ignores this flag, others do not support it. This utitilty is there to allow users to write code agnostic to signal negation. For example for reset and reset_n_isOn() check can be used to resolve if reset is activated.

• is_bigendian – if True the value is threated as big endian (byte 0 the most significant) this does not affect the direction of bit range (to/downto)

• ~.strict_width – if True width can not be auto_casted (in operators/assignment/…)

• ~.strict_sign – same thing as strict_width just for signed/unsigned

casting rules

• strict_width/strict_sign True has the higher priority when resolving operator result type

• if False width/sign is allowed to change to dst type value.

• strict_width=False:

  • assignment: auto extended/trimmed

  • multi operand operator: pick the widest type

• strict_sign=False

  • assignment: auto cast

  • multi operand operator: signed if any operand signed

• cast of negated flag does nothing (if )

  BIT BIT_N

  =======| ========= ========= BIT | nop nop BIT_N | nop nop

• auto_cast - casts flags

• explicit_cast - resize/change sign

• reinterpret_cast - raw bits as something else

__init__(bit_length: int | AnyHBitsValue, signed: Literal[None, True, False] = None, force_vector: bool = False, negated: bool = False, is_bigendian: bool = False, byte_width: int = 8, name: str | None = None, const: bool = False, strict_sign: bool = True, strict_width: bool = True)

_constCls

alias of HBitsConst

_createMutated(bit_length: int | AnyHBitsValue = <class 'hwt.constants.NOT_SPECIFIED'>, signed: Literal[None, True, False]=<class 'hwt.constants.NOT_SPECIFIED'>, force_vector: bool = <class 'hwt.constants.NOT_SPECIFIED'>, negated: bool = <class 'hwt.constants.NOT_SPECIFIED'>, is_bigendian=<class 'hwt.constants.NOT_SPECIFIED'>, byte_width=<class 'hwt.constants.NOT_SPECIFIED'>, name: str | None = <class 'hwt.constants.NOT_SPECIFIED'>, const: bool = <class 'hwt.constants.NOT_SPECIFIED'>, strict_sign: bool = <class 'hwt.constants.NOT_SPECIFIED'>, strict_width: bool = <class 'hwt.constants.NOT_SPECIFIED'>) → Self

differs_only_in_strictness_flags(other: Self) → bool

domain_size()

Returns:

how many values can have specified type

getAllOnesValue()

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod get_auto_cast_HConst_fn()

classmethod get_auto_cast_RtlSignal_fn()

classmethod get_explicit_cast_HConst_fn()

classmethod get_explicit_cast_RtlSignal_fn()

classmethod get_reinterpret_cast_HConst_fn()

classmethod get_reinterpret_cast_RtlSignal_fn()

hwt.hdl.types.bitsCast module

hwt.hdl.types.bitsCastUtils module

exception hwt.hdl.types.bitsCastUtils.BitWidthErr

Bases: TypeConversionErr

Wrong bit width of signal/value

hwt.hdl.types.bitsCastUtils.fitTo(what: HBitsRtlSignal | HBitsConst, where: HBitsRtlSignal | HBitsConst, extend: bool = True, shrink: bool = True) → HBitsRtlSignal | HBitsConst

hwt.hdl.types.bitsCastUtils.fitTo_t(what: HBitsRtlSignal | HBitsConst, where_t: HBits, extend: bool = True, shrink: bool = True) → HBitsRtlSignal | HBitsConst

Slice signal “what” to fit in “where” or arithmetically (for signed by MSB / unsigned, vector with 0) extend “what” to same width as “where”

little-endian impl.

Parameters:

• extend – allow increasing of the signal width

• shrink – allow shrinking of the signal width

hwt.hdl.types.bitsConst module

class hwt.hdl.types.bitsConst.HBitsConst(dtype: HdlType, val, vld_mask)

Bases: HConst, Bits3val

Attention:

operator on signals are using value operator functions as well

_BOOL = <HBits, 1bit>

_SIGNED_FOR_CONCAT_RESULT = None

_SIGNED_FOR_SLICE_RESULT

alias of NOT_SPECIFIED

_cast_sign(signed: bool | None) → Self

Cast signed-unsigned value

_concat(other: Self | HBitsRtlSignal) → Self | HBitsRtlSignal

Concatenate two bit vectors together (self will be at MSB side) Verilog: {self, other}, VHDL: self & other

_dtype

_eq(other: HBitsRtlSignal | HBitsConst | int | None) → Self | HBitsRtlSignal

See:

SignalOps._eq()

_isOn()

_signed() → Self

_ternary(vTrue: Self | HBitsRtlSignal, vFalse: Self | HBitsRtlSignal) → Self | HBitsRtlSignal

Ternary operator (a if self else b).

_unsigned() → Self

_vec() → Self

classmethod from_py(typeObj: HBits, val: int | None | bytes | Self, vld_mask=None) → Self

getMsb() → Self

prettyRepr() → str

to_py() → int | None

Cast HConst back to pythonic value like int/float/list[int] etc.

val

vld_mask

hwt.hdl.types.bitsRtlSignal module

class hwt.hdl.types.bitsRtlSignal.HBitsRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_cast_sign(signed: bool | None) → Self

Convert signum, no bit manipulation just data are represented differently

Parameters:

signed – if True value will be signed, if False value will be unsigned, if None value will be vector without any sign specification

_concat(other: HBitsConst | Self) → Self

Concatenate this with other to one wider value/signal

_const

_ctx

_eq(other: HBitsRtlSignal | HBitsConst | int | None) → HBitsConst | Self

_ext(newWidth: int | HBitsConst, signed: bool | ~typing.Literal[<class 'hwt.constants.NOT_SPECIFIED'>] = <class 'hwt.constants.NOT_SPECIFIED'>) → Self

construct zext/sext operator :note: preserves sign of type

_extOrTrunc(newWidth: int, signed: bool | None | ~typing.Literal[<class 'pyMathBitPrecise.bits3t._NOT_SPECIFIED'>] = <class 'pyMathBitPrecise.bits3t._NOT_SPECIFIED'>) → Self

_hasGenericName

_hdlName

_hwIO

_instId

_isOn() → Self

_isUnnamedExpr

_nop_val

_onFallingEdge() → Self

_onRisingEdge() → Self

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_sext(newWidth: int | HBitsConst) → Self

signed extension, pad with MSB bit on MSB side to newWidth result width :see: HBitsRtlSignal._ext()

_signed() → Self

_ternary(vTrue: HBitsConst | Self, vFalse: HBitsConst | Self) → HBitsConst | Self

_trunc(newWidth: int | HBitsConst)

_unsigned() → Self

_usedOps

_usedOpsAlias

_vec() → Self

_zext(newWidth: int | HBitsConst) → Self

zero extension, pad with 0 on msb side to newWidth result width :see: HBitsRtlSignal._ext()

getMsb() → Self

hwt.hdl.types.defs module

Definitions of most common types

hwt.hdl.types.enum module

class hwt.hdl.types.enum.HEnum(name, valueNames, const=False)

Bases: HdlType

Hdl enum type

Variables:

• ~.name – name of this type

• ~._allValues – tuple of all values for this enum

Note:

for each value there is a property on this type object

__init__(name, valueNames, const=False)

Parameters:

• name – name for this type

• valueNames – sequence of string which will be used as names for enum members

all_mask()

bit_length()

domain_size()

Returns:

how many values can have specified type

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

hwt.hdl.types.enumConst module

class hwt.hdl.types.enumConst.HEnumConst(dtype: HdlType, val, vld_mask)

Bases: HConst

_dtype

_eq(other: HEnumRtlSignal | Self) → HBitsConst

See:

SignalOps._eq()

classmethod from_py(typeObj, val, vld_mask=None)

Parameters:

• val – value of python type bool or None

• typeObj – instance of HEnum

• vld_mask – if is None validity is resolved from val if is 0 value is invalidated if is 1 value has to be valid

val

vld_mask

class hwt.hdl.types.enumConst.HEnumRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_const

_ctx

_eq(other: Self | HEnumConst) → HBitsConst

_hasGenericName

_hdlName

_hwIO

_instId

_isUnnamedExpr

_nop_val

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_usedOps

_usedOpsAlias

hwt.hdl.types.float module

class hwt.hdl.types.float.HFloat(exponent_w, mantisa_w, name=None, const=False)

Bases: HdlType, Floatt

Basic HDL type representing IEEE 754 like float type.

Note:

This type is meant for HwModule parameters, operations with this type are not synthetisable.

__init__(exponent_w, mantisa_w, name=None, const=False)

Parameters:

negated – if true the value is in negated form

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

hwt.hdl.types.floatConst module

class hwt.hdl.types.floatConst.HFloatConst(dtype: HdlType, val, vld_mask)

Bases: HConst, FloattVal

HConst class for HFloat type.

_dtype

_eq(other)

See:

SignalOps._eq()

_is_full_valid()

Returns:

True if all bits in value are valid

classmethod from_py(typeObj, val, vld_mask=None)

to_py() → float

Convert to python slice object

val

vld_mask

class hwt.hdl.types.floatConst.HFloatRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_const

_ctx

_eq(other)

_hasGenericName

_hdlName

_hwIO

_instId

_isUnnamedExpr

_nop_val

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_usedOps

_usedOpsAlias

hwt.hdl.types.floatConst._HFloatEq(self, self_is_val: bool, other)

hwt.hdl.types.function module

class hwt.hdl.types.function.HFunction(const=False)

Bases: HdlType

A type which represent reference to HDL function.

Note:

For compatibility with HDL only. It is not meant to be used as a function pointer to call a function in synthetisable code.

_PRECOMPUTE_CONSTANT_SIGNALS = False

all_mask()

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

class hwt.hdl.types.function.HFunctionConst(dtype: HdlType, val, vld_mask)

Bases: HConst

_dtype

val

vld_mask

hwt.hdl.types.hdlType module

class hwt.hdl.types.hdlType.HdlType(const=False)

Bases: object

Base class for all hardware related types.

Variables:

• const – if True the type has const specifier which means that the value should not be modified after initialization and is read only

• ~._PRECOMPUTE_CONSTANT_SIGNALS – if true a constant expressions made from this type have value pre-computed.

Note:

Cast functions are linked trough HldType class because Python lacks forward declarations.

Note:

Each implementation of HdlType also defines is HConst and RtlSignal class. These classes then implement operators and methods for constants/expressions.

_PRECOMPUTE_CONSTANT_SIGNALS = True

__init__(const=False)

_as_hdl(to_Hdl: ToHdlAst, declaration: bool)

_as_hdl_requires_def(to_Hdl: ToHdlAst, other_types: list)

_from_py(v, vld_mask) → HConst

same as from_py just without type checks

_reverse_auto_cast_HConst(v: HConst, fromType: Self) → HConst

_reverse_auto_cast_RtlSignal(v: RtlSignal, fromType: Self) → RtlSignal

_reverse_explicit_cast_HConst(v: HConst, fromType: Self) → HConst

_reverse_explicit_cast_RtlSignal(v: RtlSignal, fromType: Self) → RtlSignal

_reverse_reinterpret_cast_HConst(v: HConst, fromType: Self) → HConst

_reverse_reinterpret_cast_RtlSignal(v: RtlSignal, fromType: Self) → RtlSignal

auto_cast_HConst(v: HConst, toType: Self) → HConst

Cast constant of this type to another compatible type. :note: auto cast may change bitwidth if type

implements it in auto cast

Parameters:

• v – constant to cast

• toType – instance of HdlType to cast into

auto_cast_RtlSignal(v: RtlSignal, toType: Self) → RtlSignal

Equivalent of auto_cast_HConst() for RtlSignal instances

explicit_cast_HConst(v: HConst, toType: Self) → HConst

Cast constant of this type to another friendly type.

Parameters:

• v – constant to cast

• toType – instance of HdlType to cast into

explicit_cast_RtlSignal(v: RtlSignal, toType: Self) → RtlSignal

Cast value or signal of this type to another type of same size.

Parameters:

• v – signal to cast

• toType – instance of HdlType to cast into

from_py(v, vld_mask=None) → HConst

Construct value of this type. Delegated on value class for this type

classmethod getConstCls() → Type[HConst]

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls() → Type[RtlSignal]

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod get_auto_cast_HConst_fn()

classmethod get_auto_cast_RtlSignal_fn()

classmethod get_explicit_cast_HConst_fn()

classmethod get_explicit_cast_RtlSignal_fn()

classmethod get_reinterpret_cast_HConst_fn()

classmethod get_reinterpret_cast_RtlSignal_fn()

classmethod get_reverse_auto_cast_HConst_fn()

classmethod get_reverse_auto_cast_RtlSignal_fn()

classmethod get_reverse_explicit_cast_HConst_fn()

classmethod get_reverse_explicit_cast_RtlSignal_fn()

classmethod get_reverse_reinterpret_cast_HConst_fn()

classmethod get_reverse_reinterpret_cast_RtlSignal_fn()

isScalar()

reinterpret_cast_HConst(v: HConst, toType: Self) → HConst

Cast constant of this type to another type of same size.

Parameters:

• v – constant to cast

• toType – instance of HdlType to cast into

reinterpret_cast_RtlSignal(v: RtlSignal, toType: Self) → RtlSignal

Cast value or signal of this type to another type of same size.

Parameters:

• v – signal to cast

• toType – instance of HdlType to cast into

exception hwt.hdl.types.hdlType.MethodNotOverloaded

Bases: NotImplementedError

Method is missing overload of abstract parent method.

hwt.hdl.types.hdlType.default_auto_cast_fn(typeFrom: HdlType, sigOrConst: RtlSignal | HConst, toType: HdlType)

hwt.hdl.types.hdlType.default_explicit_cast_fn(typeFrom: HdlType, sigOrConst: RtlSignal | HConst, toType: HdlType)

hwt.hdl.types.hdlType.default_reinterpret_cast_fn(fromType: HdlType, sigOrConst: RtlSignal | HConst, toType: HdlType)

hwt.hdl.types.hdlType.default_reverse_auto_cast_fn(toType: HdlType, sigOrConst: RtlSignal | HConst, fromType: HdlType)

hwt.hdl.types.hdlType.default_reverse_explicit_cast_fn(toType: HdlType, sigOrConst: RtlSignal | HConst, fromType: HdlType)

hwt.hdl.types.hdlType.default_reverse_reinterpret_cast_fn(toType: HdlType, sigOrConst: RtlSignal | HConst, fromType: HdlType)

hwt.hdl.types.slice module

class hwt.hdl.types.slice.HSlice(const=False)

Bases: HdlType

Slice type, used for selecting items from arrays or vectors

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

hwt.hdl.types.sliceConst module

class hwt.hdl.types.sliceConst.HSliceConst(dtype: HdlType, val, vld_mask)

Bases: HConst

HConst class for HSlice type

_dtype

_eq(other)

See:

SignalOps._eq()

_is_full_valid() → bool

_is_partially_valid() → bool

_size()

Returns:

how many bits is this slice selecting

classmethod from_py(typeObj, val, vld_mask=None)

staticEval()

to_py() → slice

Convert to python slice object

val

vld_mask

class hwt.hdl.types.sliceConst.HSliceRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_const

_ctx

_hasGenericName

_hdlName

_hwIO

_instId

_isUnnamedExpr

_nop_val

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_usedOps

_usedOpsAlias

hwt.hdl.types.sliceConst.slice_member_to_HConst(v)

hwt.hdl.types.sliceUtils module

hwt.hdl.types.sliceUtils.slice_to_HSlice(sliceVals: slice, widthOfSlicedVec: int)

convert python slice to value of SLICE hdl type

hwt.hdl.types.stream module

class hwt.hdl.types.stream.HStream(element_t, frame_len=inf, start_offsets: List[int] | None = None, const=False)

Bases: HdlType

Stream is an abstract type. It is an array with unspecified size.

Variables:

• ~.element_t – type of the smallest chunk of data which can be send over this stream

• ~.len_min – minimum repetitions of element_t (inclusive interval)

• ~.len_max – maximum repetitions of element_t (inclusive interval)

• ~.start_offsets – list of numbers which represents the number of invalid bytes before valid data on stream (invalid bytes means the bytes which does not have bit validity set, e.g. Axi4Stream keep=0b10 -> offset=1 )

Note:

Endianity of the field does not have effect on parsing/deparsing algorithm

__init__(element_t, frame_len=inf, start_offsets: List[int] | None = None, const=False)

bit_length()

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

hwt.hdl.types.streamConst module

class hwt.hdl.types.streamConst.HStreamConst(dtype: HdlType, val, vld_mask)

Bases: HConst

Class for values of HStream HDL type

_dtype

_eq(other)

See:

SignalOps._eq()

_getitem__const(key)

Attention:

this will clone item from array, iterate over .val if you need to modify items

_is_full_valid()

classmethod from_py(typeObj, val, vld_mask=None)

Parameters:

• typeObj – HStream instance

• val – None or iterrable of values

• vld_mask – if is None validity is resolved from val if is 0 value is invalidated if is 1 value has to be valid

to_py() → list

Cast HConst back to pythonic value like int/float/list[int] etc.

val

vld_mask

hwt.hdl.types.string module

class hwt.hdl.types.string.HString(const=False)

Bases: HdlType

Note:

This type is meant for HwModule parameters, operations with this type are not synthetisable.

all_mask()

classmethod getConstCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

classmethod getRtlSignalCls()

Attention:

Overrode in implementation of concrete HdlType.

Returns:

class for value derived from this type

hwt.hdl.types.stringConst module

class hwt.hdl.types.stringConst.HStringConst(dtype: HdlType, val, vld_mask)

Bases: HConst

Value class for hdl HString type

_dtype

_eq(other)

See:

SignalOps._eq()

classmethod from_py(typeObj: HString, val: str | None, vld_mask: int | None = None)

Parameters:

• val – python string or None

• typeObj – instance of HString HdlType

• vld_mask – if is None validity is resolved from val if is 0 value is invalidated if is 1 value has to be valid

to_py() → str

Cast HConst back to pythonic value like int/float/list[int] etc.

val

vld_mask

class hwt.hdl.types.stringConst.HStringRtlSignal(ctx: RtlNetlist, name: str, dtype: HdlType, def_val=None, nop_val=<class 'hwt.constants.NOT_SPECIFIED'>, next_signal: NOT_SPECIFIED'>, <class 'hwt.synthesizer.rtlLevel.rtlSignal.CREATE_NEXT_SIGNAL'>]=<class 'hwt.constants.NOT_SPECIFIED'>, virtual_only=False, is_const=False)

Bases: RtlSignal

_const

_ctx

_eq(other)

_hasGenericName

_hdlName

_hwIO

_instId

_isUnnamedExpr

_nop_val

_rtlDrivers

_rtlEndpoints

_rtlNextSig

_rtlObjectOrigin

_usedOps

_usedOpsAlias

hwt.hdl.types.struct module

hwt.hdl.types.structCast module

hwt.hdl.types.structUtils module

hwt.hdl.types.structValBase module

hwt.hdl.types.typeCast module

hwt.hdl.types.typeCast.toHVal(op: Any, suggestedType: HdlType | None = None) → HConst | RtlSignalBase | HwIOBase

Convert python or hdl HConst/RtlSignal object to hdl HConst/RtlSignal object

hwt.hdl.types.union module

hwt.hdl.types.utils module